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Commit 640e8b73 authored by Christopher Snowhill's avatar Christopher Snowhill

Various architectural changes to make Intel plus Apple Silicon build successfully

parent 002e1626
......@@ -32,8 +32,12 @@
#ifndef _WIN32
#define __cdecl
#ifdef __aarch64__
#define __fastcall
#else
#define __fastcall __attribute__((regparm(3)))
#endif
#endif
/* No dynarec for x86_64 yet */
#if defined(_WIN32) || defined(__i386__)
......
......@@ -24,8 +24,12 @@
#ifndef _WIN32
#define __cdecl
#ifdef __aarch64__
#define __fastcall
#else
#define __fastcall __attribute__((regparm(3)))
#endif
#endif
/* No dynarec for x86_64 yet */
#if defined(_WIN32) || defined(__i386__)
......
......@@ -18,8 +18,13 @@ typedef char TEXT;
#ifdef _WIN32
typedef int BOOL;
#else
#ifdef __aarch64__
#include <stdbool.h>
typedef bool BOOL;
#else
typedef signed char BOOL;
#endif
#endif
#define TRUE 1
#define FALSE 0
......
......@@ -31,7 +31,7 @@
#include "config.h"
#endif
#ifdef OPUS_HAVE_RTCD
#if defined(OPUS_HAVE_RTCD) && defined(__aarch64__)
#include "armcpu.h"
#include "cpu_support.h"
......
......@@ -34,10 +34,11 @@
#include "config.h"
#endif
#if !defined(FIXED_POINT) && defined(OPUS_ARM_MAY_HAVE_NEON_INTR)
#include <arm_neon.h>
#include "../pitch.h"
#if !defined(FIXED_POINT)
/*
* Function: xcorr_kernel_neon_float
* ---------------------------------
......
......@@ -549,3 +549,4 @@ celt_pitch_xcorr_edsp_done:
@ END:
.section .note.GNU-stack,"",%progbits
......@@ -29,7 +29,7 @@
#include "config.h"
#endif
#if defined(FIXED_POINT)
#if defined(FIXED_POINT) && defined(OPUS_X86_MAY_HAVE_SSE4_1)
#include <xmmintrin.h>
#include <emmintrin.h>
......
......@@ -29,6 +29,8 @@
#include "config.h"
#endif
#ifdef __x86_64__
#include "macros.h"
#include "celt_lpc.h"
#include "stack_alloc.h"
......@@ -182,4 +184,6 @@ void comb_filter_const_sse(opus_val32 *y, opus_val32 *x, int T, int N,
}
#endif
#endif
......@@ -29,6 +29,8 @@
#include "config.h"
#endif
#ifdef __x86_64__
#include <xmmintrin.h>
#include <emmintrin.h>
......@@ -93,3 +95,5 @@ opus_val32 celt_inner_prod_sse2(const opus_val16 *x, const opus_val16 *y,
return sum;
}
#endif
#endif
......@@ -29,6 +29,8 @@
#include "config.h"
#endif
#if defined(OPUS_X86_MAY_HAVE_SSE4_1) && defined(FIXED_POINT)
#include <xmmintrin.h>
#include <emmintrin.h>
......@@ -38,7 +40,6 @@
#include "mathops.h"
#include "pitch.h"
#if defined(OPUS_X86_MAY_HAVE_SSE4_1) && defined(FIXED_POINT)
#include <smmintrin.h>
#include "x86cpu.h"
......
......@@ -29,11 +29,17 @@
#include "config.h"
#endif
#ifdef __x86_64__
#include "cpu_support.h"
#include "arch.h"
#include "x86/x86cpu.h"
#include "celt_lpc.h"
#include "pitch.h"
#include "pitch_sse.h"
#if defined(OPUS_HAVE_RTCD)
# if defined(FIXED_POINT)
......@@ -146,3 +152,5 @@ void (*const COMB_FILTER_CONST_IMPL[OPUS_ARCHMASK + 1])(
#endif
#endif
#endif
......@@ -29,17 +29,16 @@
#include "config.h"
#endif
#if (defined(OPUS_X86_MAY_HAVE_SSE) && !defined(OPUS_X86_PRESUME_SSE)) || \
(defined(OPUS_X86_MAY_HAVE_SSE2) && !defined(OPUS_X86_PRESUME_SSE2)) || \
(defined(OPUS_X86_MAY_HAVE_SSE4_1) && !defined(OPUS_X86_PRESUME_SSE4_1))
#include "cpu_support.h"
#include "macros.h"
#include "main.h"
#include "pitch.h"
#include "x86cpu.h"
#if (defined(OPUS_X86_MAY_HAVE_SSE) && !defined(OPUS_X86_PRESUME_SSE)) || \
(defined(OPUS_X86_MAY_HAVE_SSE2) && !defined(OPUS_X86_PRESUME_SSE2)) || \
(defined(OPUS_X86_MAY_HAVE_SSE4_1) && !defined(OPUS_X86_PRESUME_SSE4_1))
#if defined(_MSC_VER)
#include <intrin.h>
......
......@@ -41,9 +41,19 @@ POSSIBILITY OF SUCH DAMAGE.
#define __MACOSX__
#ifndef __aarch64__
#define OPUS_HAVE_RTCD 1
#define OPUS_X86_MAY_HAVE_SSE 1
#define OPUS_X86_MAY_HAVE_SSE2 1
#define OPUS_X86_MAY_HAVE_SSE4_1 1
#else
#undef OPUS_HAVE_RTCD
#define OPUS_ARM_MAY_HAVE_NEON 1
#define OPUS_ARM_MAY_HAVE_NEON_INTR 1
#define OPUS_ARM_PRESUME_NEON 1
#define OPUS_ARM_PRESUME_NEON_INTR 1
#endif
#endif CONFIG_H
......@@ -29,6 +29,8 @@
#include "config.h"
#endif
#if defined(OPUS_X86_MAY_HAVE_SSE4_1)
#include <xmmintrin.h>
#include <emmintrin.h>
#include <smmintrin.h>
......@@ -855,3 +857,5 @@ static OPUS_INLINE void silk_nsq_del_dec_scale_states_sse4_1(
}
}
}
#endif
......@@ -29,6 +29,8 @@
#include "config.h"
#endif
#ifdef __x86_64__
#include <xmmintrin.h>
#include <emmintrin.h>
#include <smmintrin.h>
......@@ -718,3 +720,5 @@ static OPUS_INLINE void silk_nsq_scale_states_sse4_1(
}
}
}
#endif
......@@ -29,6 +29,8 @@
#include "config.h"
#endif
#ifdef __x86_64__
#include <xmmintrin.h>
#include <emmintrin.h>
#include <smmintrin.h>
......@@ -275,3 +277,5 @@ opus_int silk_VAD_GetSA_Q8_sse4_1( /* O Return value, 0 if s
RESTORE_STACK;
return( ret );
}
#endif
......@@ -29,6 +29,8 @@
#include "config.h"
#endif
#ifdef __x86_64__
#include <xmmintrin.h>
#include <emmintrin.h>
#include <smmintrin.h>
......@@ -140,3 +142,5 @@ void silk_VQ_WMat_EC_sse4_1(
cb_row_Q7 += LTP_ORDER;
}
}
#endif
......@@ -35,7 +35,7 @@
#include "pitch.h"
#include "main.h"
#if !defined(OPUS_X86_PRESUME_SSE4_1)
#if !defined(OPUS_X86_PRESUME_SSE4_1) && defined(__x86_64__)
#if defined(FIXED_POINT)
......
......@@ -1186,9 +1186,9 @@
DYLIB_COMPATIBILITY_VERSION = 1;
DYLIB_CURRENT_VERSION = 1;
FRAMEWORK_VERSION = A;
GCC_PREPROCESSOR_DEFINITIONS = (
GCC_PREPROCESSOR_DEFINITIONS = "DEBUG=1";
"GCC_PREPROCESSOR_DEFINITIONS[arch=i386]" = (
"DEBUG=1",
ARCH_MIN_SSE2,
DYNAREC,
);
GCC_WARN_PEDANTIC = YES;
......@@ -1215,9 +1215,9 @@
DYLIB_CURRENT_VERSION = 1;
FRAMEWORK_VERSION = A;
GCC_OPTIMIZATION_LEVEL = fast;
GCC_PREPROCESSOR_DEFINITIONS = (
GCC_PREPROCESSOR_DEFINITIONS = "$(inherit)";
"GCC_PREPROCESSOR_DEFINITIONS[arch=i386]" = (
"$(inherit)",
ARCH_MIN_SSE2,
DYNAREC,
);
GCC_WARN_PEDANTIC = YES;
......
......@@ -154,7 +154,9 @@ static void osal_fastcall FIN_BLOCK(usf_state_t * state)
Used by dynarec only, check should be unnecessary
*/
state->PC->ops(state);
#ifdef DYNAREC
if (state->r4300emu == CORE_DYNAREC) dyna_jump(state);
#endif
}
else
{
......@@ -176,7 +178,9 @@ Used by dynarec only, check should be unnecessary
else
state->PC->ops(state);
#ifdef DYNAREC
if (state->r4300emu == CORE_DYNAREC) dyna_jump(state);
#endif
}
}
......@@ -196,8 +200,10 @@ The preceeding update_debugger SHOULD be unnecessary since it should have been
called before NOTCOMPILED would have been executed
*/
state->PC->ops(state);
#ifdef DYNAREC
if (state->r4300emu == CORE_DYNAREC)
dyna_jump(state);
#endif
}
static void osal_fastcall NOTCOMPILED2(usf_state_t * state)
......@@ -537,7 +543,9 @@ void osal_fastcall jump_to_func(usf_state_t * state)
}
state->PC=state->actual->block+((addr-state->actual->start)>>2);
#ifdef DYNAREC
if (state->r4300emu == CORE_DYNAREC) dyna_jump(state);
#endif
}
#undef addr
......
......@@ -96,11 +96,13 @@ void TLB_refill_exception(usf_state_t * state, unsigned int address, int w)
state->last_addr = state->PC->addr;
#ifdef DYNAREC
if (state->r4300emu == CORE_DYNAREC)
{
dyna_jump(state);
if (!state->dyna_interp) state->delay_slot = 0;
}
#endif
if (state->r4300emu != CORE_DYNAREC || state->dyna_interp)
{
......@@ -131,11 +133,13 @@ void osal_fastcall exception_general(usf_state_t * state)
}
generic_jump_to(state, 0x80000180);
state->last_addr = state->PC->addr;
#ifdef DYNAREC
if (state->r4300emu == CORE_DYNAREC)
{
dyna_jump(state);
if (!state->dyna_interp) state->delay_slot = 0;
}
#endif
if (state->r4300emu != CORE_DYNAREC || state->dyna_interp)
{
state->dyna_interp = 0;
......
......@@ -506,7 +506,9 @@ void osal_fastcall gen_interupt(usf_state_t * state)
if (state->stop == 1)
{
state->g_gs_vi_counter = 0; // debug
#ifdef DYNAREC
dyna_stop(state);
#endif
}
if (!state->interupt_unsafe_state)
......
......@@ -206,6 +206,7 @@ void r4300_reset_soft(usf_state_t * state)
/* ready to execute IPL3 */
}
#ifdef DYNAREC
#if !defined(NO_ASM)
static void dynarec_setup_code()
{
......@@ -236,6 +237,7 @@ static void dynarec_setup_code()
dyna_stop(state);
}
#endif
#endif
void r4300_begin(usf_state_t * state)
{
......
This diff is collapsed.
......@@ -73,7 +73,9 @@ typedef struct _precomp_instr
} f;
unsigned int addr; /* word-aligned instruction address in r4300 address space */
unsigned int local_addr; /* byte offset to start of corresponding x86_64 instructions, from start of code block */
#ifdef DYNAREC
reg_cache_struct reg_cache_infos;
#endif
} precomp_instr;
typedef struct _precomp_block
......
......@@ -44,6 +44,7 @@
/* Static Functions */
#ifdef DYNAREC
void add_jump(usf_state_t * state, unsigned int pc_addr, unsigned int mi_addr, unsigned int absolute64)
{
if (state->jumps_number == state->max_jumps_number)
......@@ -199,3 +200,6 @@ void jump_end_rel32(usf_state_t * state)
put32(state, jump_vec);
state->code_length = jump_end;
}
#endif
......@@ -77,6 +77,7 @@
#define RP3 RCX
#endif
#ifdef DYNAREC
void jump_start_rel8(usf_state_t *);
void jump_end_rel8(usf_state_t *);
void jump_start_rel32(usf_state_t *);
......@@ -1192,6 +1193,7 @@ static inline void ffree_fpreg(usf_state_t * state, int fpreg)
put8(state, 0xDD);
put8(state, 0xC0 + fpreg);
}
#endif
#endif /* M64P_R4300_ASSEMBLE_H */
......@@ -23,6 +23,7 @@
#ifndef M64P_R4300_ASSEMBLE_STRUCT_H
#define M64P_R4300_ASSEMBLE_STRUCT_H
#ifdef DYNAREC
typedef struct _reg_cache_struct
{
int need_map;
......@@ -30,5 +31,6 @@ typedef struct _reg_cache_struct
unsigned char jump_wrapper[84];
int need_cop1_check;
} reg_cache_struct;
#endif
#endif /* M64P_R4300_ASSEMBLE_STRUCT_H */
......@@ -39,6 +39,7 @@
#include "r4300/instr_counters.h"
#endif
#ifdef DYNAREC
static void genbc1f_test(usf_state_t * state)
{
test_m32rel_imm32(state, (unsigned int*)&state->FCR31, 0x800000);
......@@ -303,3 +304,4 @@ void genbc1tl_idle(usf_state_t * state)
#endif
}
#endif
......@@ -38,6 +38,7 @@
#include "r4300/instr_counters.h"
#endif
#ifdef DYNAREC
void genmfc0(usf_state_t * state)
{
#if defined(COUNT_INSTR)
......@@ -53,4 +54,4 @@ void genmtc0(usf_state_t * state)
#endif
gencallinterp(state, (unsigned long long)state->current_instruction_table.MTC0, 0);
}
#endif
......@@ -42,6 +42,7 @@
#include "r4300/instr_counters.h"
#endif
#ifdef DYNAREC
void genmfc1(usf_state_t * state)
{
#if defined(COUNT_INSTR)
......@@ -160,4 +161,4 @@ void genctc1(usf_state_t * state)
fldcw_m16rel(state, (unsigned short*)&state->rounding_mode);
#endif
}
#endif
......@@ -38,6 +38,7 @@
#include "r4300/instr_counters.h"
#endif
#ifdef DYNAREC
void genadd_d(usf_state_t * state)
{
#if defined(COUNT_INSTR)
......@@ -716,4 +717,4 @@ void genc_ngt_d(usf_state_t * state)
and_m32rel_imm32(state, (unsigned int*)&state->FCR31, ~0x800000); // 11
#endif
}
#endif
......@@ -36,6 +36,7 @@
#include "r4300/instr_counters.h"
#endif
#ifdef DYNAREC
void gencvt_s_l(usf_state_t * state)
{
#if defined(COUNT_INSTR)
......@@ -67,4 +68,4 @@ void gencvt_d_l(usf_state_t * state)
fstp_preg64_qword(state, RAX);
#endif
}
#endif
......@@ -39,6 +39,7 @@
#include "r4300/instr_counters.h"
#endif
#ifdef DYNAREC
void genadd_s(usf_state_t * state)
{
#if defined(COUNT_INSTR)
......@@ -715,4 +716,4 @@ void genc_ngt_s(usf_state_t * state)
and_m32rel_imm32(state, (unsigned int*)&state->FCR31, ~0x800000); // 11
#endif
}
#endif
......@@ -38,6 +38,7 @@
#include "r4300/instr_counters.h"
#endif
#ifdef DYNAREC
void gencvt_s_w(usf_state_t * state)
{
#if defined(COUNT_INSTR)
......@@ -69,4 +70,4 @@ void gencvt_d_w(usf_state_t * state)
fstp_preg64_qword(state, RAX);
#endif
}
#endif
......@@ -49,6 +49,7 @@
/* static functions */
#ifdef DYNAREC
static void genupdate_count(usf_state_t * state, unsigned int addr)
{
mov_reg32_imm32(state, EAX, addr);
......@@ -2257,4 +2258,4 @@ void gensc(usf_state_t * state)
#endif
gencallinterp(state, (unsigned long long)state->current_instruction_table.SC, 0);
}
#endif
......@@ -42,6 +42,7 @@
#include "r4300/instr_counters.h"
#endif
#ifdef DYNAREC
static void genbltz_test(usf_state_t * state)
{
int rs_64bit = is64(state, (unsigned int *)state->dst->f.i.rs);
......@@ -608,4 +609,4 @@ void genbgezall_idle(usf_state_t * state)
genbgezall(state);
#endif
}
#endif
......@@ -45,6 +45,7 @@
# define offsetof(TYPE,MEMBER) ((unsigned int) &((TYPE*)0)->MEMBER)
#endif
#ifdef DYNAREC
void gensll(usf_state_t * state)
{
#if defined(COUNT_INSTR)
......@@ -1075,4 +1076,4 @@ void genbreak(usf_state_t * state)
{
gencallinterp(state, (unsigned long long)state->current_instruction_table.BREAK, 0);
}
#endif
......@@ -37,6 +37,7 @@
#include "r4300/instr_counters.h"
#endif
#ifdef DYNAREC
void gentlbwi(usf_state_t * state)
{
#if defined(COUNT_INSTR)
......@@ -98,4 +99,4 @@ void gentlbwr(usf_state_t * state)
#endif
gencallinterp(state, (unsigned long long)state->current_instruction_table.TLBWR, 0);
}
#endif
......@@ -34,6 +34,7 @@
#include "r4300/r4300.h"
#include "r4300/recomph.h"
#ifdef DYNAREC
void init_cache(usf_state_t * state, precomp_instr* start)
{
int i;
......@@ -622,4 +623,4 @@ void build_wrappers(usf_state_t * state, precomp_instr *instr, int start, int en
}
}
}
#endif
......@@ -25,6 +25,7 @@
#include "r4300/recomp.h"
#ifdef DYNAREC
void init_cache(usf_state_t *, precomp_instr* start);
void free_registers_move_start(usf_state_t *);
void free_all_registers(usf_state_t *);
......@@ -42,6 +43,7 @@ int allocate_register_64_w(usf_state_t *, unsigned long long *addr);
void allocate_register_32_manually(usf_state_t *, int reg, unsigned int *addr);
void allocate_register_32_manually_w(usf_state_t *, int reg, unsigned int *addr);
void build_wrappers(usf_state_t *, precomp_instr*, int, int, precomp_block*);
#endif
#endif /* M64P_R4300_REGCACHE_H */
......@@ -20,6 +20,8 @@
* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. *
* * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * */
#ifdef DYNAREC
#include <stdlib.h>
#include "usf/usf.h"
......@@ -108,4 +110,4 @@ void dyna_stop(usf_state_t * state)
*state->return_address = (unsigned long long) state->save_rip;
}
}
#endif